Analog Design Engineer Intern - Master’s Degree (2301355)
Marvell Technologies
Internship
Closes on Sunday, October 13, 2024
Job Description
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell’s Power Management IC (PMIC) Team is seeking an analog IC design intern to support the development of power IC products at its Chandler, AZ location. Job responsibilities include support of IC design through design and layout, silicon evaluation and characterization. The successful candidate will be self-motivated, willing to learn exciting new technologies and be able to work effectively within a talented group of individuals.
Projects vary depending on product cycles and individual student interests. You will gain exposure to a variety of IC design engineering skills and tools during your internship.
What You Can Expect
- Transistor level circuit design, simulation, and layout
- System level/behavioral modeling and simulation
- Power IC evaluation and debug in laboratory
What We're Looking For
Minimum Qualifications:
- Candidate must be currently pursuing a MS degree in EE / CE or related field
- Strong intuitive and analytical understanding of analog transistor level design
- Good understanding of semiconductor device physics
- Good understanding of analog circuitry (op-amps, comparators, etc)
- Relevant analog IC design and/or power electronics coursework
Preferred Qualifications:
- Experience with DC/DC converters and/or LDOs
- Experience with lab equipment (power supplies, oscilloscopes, etc).
- Experience in Cadence schematics capture, simulation and layout tools
Expected Base Pay Range (USD)
28 - 54, $ per hour.
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage or opt-out credit, perks and discount programs, virtual fitness subsidy, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation maybe available for intern PhD candidates. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Full-Time Internship 2301355 Marvell Technologies